Ball grid array (BGA) semiconductor package is characterized in having a plurality of solder balls formed on a back side of a substrate, the solder balls serving as input/output (I/O) connections for electrically connecting a semiconductor die mounted on a front side of the substrate to an external printed circuit board (PCB). The BGA semiconductor package can beneficially accommodate more I/O connections, such that a semiconductor die formed with more electronic circuits and components is more suitably incorporated in the BGA package than a conventional leadframe-based package. As a result, the BGA semiconductor package has become the mainstream packaging technology for use in the electronic products requiring high processing speed and small size.
In order to lower the manufacturing cost, the BGA packages are generally fabricated in a batch-type manner. The batch-type method comprises the following steps. First, a matrix substrate strip is prepared comprising a plurality of substrate units. Then a die-bonding process is performed to mount at least one semiconductor die on each of the substrate units via an adhesive, and a curing process is carried out to firmly attach the semiconductor dies to the substrate units. A wire-bonding process is performed to electrically connect the semiconductor dies and the corresponding substrate units via bonding wires. Subsequently, a molding process is implemented to form an encapsulation body that encapsulates the dies and bonding wires. Finally, a plurality of solder balls are implanted on the substrate units, and a singulation process is conducted to separate apart the plurality of substrate units so as to form a plurality of individual BGA packages.
During the curing process for securing the attachment between the semiconductor dies and the substrate units, the substrate strip mounted with semiconductor dies is placed in and clamped by a jig fixture, and then heated in an oven. The jig fixture comprises a top mold and a bottom mold. The bottom mold is formed with a cavity therein. The top mold is engaged with the bottom mold to clamp the peripheral portion of the substrate strip, allowing the semiconductor dies disposed on the central portion of the substrate strip to be evenly heated.
The semiconductor dies are made of highly pure silicon, having a small coefficient of thermal expansion (CTE) of about 3 ppm/° C. The matrix substrate strip is mostly made of glass fiber, FR-4 resin, polyimide resin or epoxy resin, whose CTE is between 18 ppm/° C. to 50 ppm/° C. When heated to high temperature during the curing process, the substrate strip would suffer greater thermal stresses, making the substrate strip lose its planarity and deformed or warped, which may lead to delamination between the semiconductor dies and the substrate units or even cracks of the dies thereby degrading the quality of the fabricated packages.
If the above semiconductor packages are applied to a high-end electronic product such as digital camera or laser printer, a flexible substrate or thin substrate having certain flexibility should be used as the die carrier. However, such a die carrier usually has poor rigidity and provides weak support such that it tends to suffer serious warpage during the curing process especially that the central portion of the substrate mounted with the semiconductor die is suspended in the mold cavity and would thus be more severely warped. The warped die carrier losing its planarity makes it difficult to precisely position the solder balls on the die carrier during a self-alignment stage of the ball-implanting process, and also makes the bonding strength between the solder balls and the die carrier degraded. Moreover, during subsequent tests, the solder balls implanted on the warped die carrier would not be all in perfect contact with the contacts in a test machine, thereby adversely affecting the reliability of the test results.
Furthermore, if the semi-fabricated packages comprising the substrate strip and the semiconductor dies mounted on the substrate strip are changed in size for example using differently sized dies and/or substrate strip, it needs to prepare various jig fixtures that are sized in accordance with the size change of the semi-fabricated packages, which not only makes the fabrication processes complicated but also increases the fabrication cost. The above fabrication method cannot be performed in a cost-effective manner using the currently available equipment or a universal jig fixture, which is thus hardly popularized in the industry.
Therefore, the problem to be solved here is to provide an improved method of manufacturing semiconductor packages to be able to avoid the above drawbacks.